Research output per year
Research output per year
Mr
I am working as an Early Stage Researcher under the research group of Electromagnetic Compatibility (EMC), Communication Technologies, in the Department of Electronics Engineering at the University of York. As part of the ETN – PETER ESR9, I will carry out research on Electromagnetic Risk Management specifically focusing on Immunity and Enclosure Shielding Effectiveness – Risk of Susceptibility. My ultimate objectives are, to develop a unique design methodology for the estimation of risk of susceptibility to EMI, to develop Power Balance (PWB) models for enclosures and its inside contents, to design an IC to measure absorbed energy and to adapt existing IC immunity standards in PWB models for system immunity risk assessment.
I accomplished my Master’s degree with a few months of Student Research Assistant experience in Electrical Systems Engineering with a focus on Electronics and Devices at the University of Paderborn in Germany, 2019. In India, I finished my Bachelor’s degree in Electrical and Electronics Engineering at Visvesvaraya Technological University, EWIT Bengaluru.
Keeping an inquisitive and explorative attitude, I believe in the abiding learning process. As a post-graduate in Electronics Engineering, my passion for Electronics is continuously magnifying. My proclivity and interest for Electromagnetism and Circuit Design germinating persistently from the very moment I started my master’s degree.
My undying passion is to continue my research in the field of Electronics to shape the future of global technology.
Research output: Chapter in Book/Report/Conference proceeding › Conference contribution
Research output: Chapter in Book/Report/Conference proceeding › Conference contribution
Research output: Chapter in Book/Report/Conference proceeding › Conference contribution
Hunasanahalli Venkateshaiah, A.
1/10/19 → 30/09/20
Project: Research project (funded) › Research