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3D integrated circuit layout visualization using VRML

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Publication details

JournalFuture generation computer systems
DatePublished - Mar 2001
Issue number5
Volume17
Number of pages9
Pages (from-to)503-511
Original languageEnglish

Abstract

This paper introduces the virtual reality modeling language (VRML) as a way to describe the layout of integrated circuits. Using this language, the circuit can be viewed in three dimensions, adding the depth dimension, not present in the regular layout description languages. A conversion tool that parses 2D circuit layout descriptions and converts it into 3D VRML models is presented. A discussion about other applications of VRML on integrated circuits design and on educational tools is also included. 

    Research areas

  • integrated circuits, virtual reality, World Wide Web

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