A High-Resilience Imprecise Computing Architecture for Mixed-Criticality Systems

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Conventional mixed-criticality systems (MCS)s are designed to terminate the execution of less critical tasks in exceptional situations so that the timing properties of more critical tasks can be preserved. Such a strategy can be controversial and has proven difficult to implement in practice, as it can lead to hazards and reduced functionality due to the absence of the discarded tasks. To mitigate this issue, the imprecise mixed-critically system model (IMCS) has been proposed. In such a model, instead of completely dropping less-critical tasks, these tasks are executed as much as possible through the use of decreased computation precision. Although IMCS could effectively improve the survivability of the less-critical tasks, it also introduces three key drawbacks - run-time computation errors, real-time performance degradation, and lack of flexibility. In this paper, we present a novel IMCS framework, which can (i) mitigate the computation errors caused by imprecise computation; (ii) achieve real-time performance near to that of a conventional MCS; (iii) enhance system-level throughput; and (iv) provide flexibility for run-time configuration. We describe the design details of HIART-MCS, and then present the corresponding theoretical analysis and optimisation method for its run-time configuration. Finally, HIART-MCS is evaluated against other MCS frameworks using a variety of experimental metrics.
Original languageEnglish
Article number9869703
Pages (from-to)29-42
Number of pages14
JournalIEEE Transactions on Computers
Issue number1
Early online date29 Aug 2022
Publication statusPublished - 1 Jan 2023

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