A proposed mechanism for super-pipelined instruction-issue for ILP stack machines

C. Bailey

doi:10.1109/DSD.2004.1333267

A proposed mechanism for super-pipelined instruction-issue for ILP stack machines

C. Bailey

Computer Science

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Abstract

A resurgence of interest in hardware stack-machine architectures, in which an implicitly addressed operand stack mode of computation is used, has followed closely in the wake of the growth of Java technology. However hardware for direct execution of stack-based machine level operations suffer from a lack of development in areas of advanced machine architecture, in particular where instruction-level parallelism is concerned In this paper the author proposes a mechanism for super-pipelined issue of stack-based instructions to support an in-order issue policy with out-of-order completion, and introduces some preliminary results in order to illustrate possible trade-offs and issues likely to be valuable focal points for a full performance assessment in future work.

Original language	English
Title of host publication	Proceedings of Euromicro Symposium on Digital Systems
Editors	H Selvaraj
Place of Publication	LOS ALAMITOS
Publisher	IEEE Computer Society
Pages	121-129
Number of pages	8
ISBN (Print)	0-7695-2203-3
DOIs	https://doi.org/10.1109/DSD.2004.1333267
Publication status	Published - 2004
Event	DSD 2004 - Rennes Duration: 31 Jan 2004 → …

Conference

Conference	DSD 2004
City	Rennes
Period	31/01/04 → …

Access to Document

10.1109/DSD.2004.1333267

http://dx.doi.org/10.1109/DSD.2004.1333267

Cite this

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title = "A proposed mechanism for super-pipelined instruction-issue for ILP stack machines",

abstract = "A resurgence of interest in hardware stack-machine architectures, in which an implicitly addressed operand stack mode of computation is used, has followed closely in the wake of the growth of Java technology. However hardware for direct execution of stack-based machine level operations suffer from a lack of development in areas of advanced machine architecture, in particular where instruction-level parallelism is concerned In this paper the author proposes a mechanism for super-pipelined issue of stack-based instructions to support an in-order issue policy with out-of-order completion, and introduces some preliminary results in order to illustrate possible trade-offs and issues likely to be valuable focal points for a full performance assessment in future work.",

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note = "DSD 2004 ; Conference date: 31-01-2004",

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AB - A resurgence of interest in hardware stack-machine architectures, in which an implicitly addressed operand stack mode of computation is used, has followed closely in the wake of the growth of Java technology. However hardware for direct execution of stack-based machine level operations suffer from a lack of development in areas of advanced machine architecture, in particular where instruction-level parallelism is concerned In this paper the author proposes a mechanism for super-pipelined issue of stack-based instructions to support an in-order issue policy with out-of-order completion, and introduces some preliminary results in order to illustrate possible trade-offs and issues likely to be valuable focal points for a full performance assessment in future work.

U2 - 10.1109/DSD.2004.1333267

DO - 10.1109/DSD.2004.1333267

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ER -