A PUF-enabled Secure Architecture for FPGA-based IoT Applications

TY - JOUR

T1 - A PUF-enabled Secure Architecture for FPGA-based IoT Applications

AU - Johnson, Anju P.

AU - Chakraborty, Rajat Subhra

AU - Mukhopadhyay, Debdeep

PY - 2015/10/26

Y1 - 2015/10/26

N2 - The Internet of Things (IoT) is a dynamic, ever-evolving “living” entity. Hence, modern Field Programmable Gate Array (FPGA) devices with Dynamic Partial Reconfiguration (DPR) capabilities, which allow in-field non-invasive modifications to the circuit implemented on the FPGA, are an ideal fit. Usually, the activation of DPR capabilities requires the procurement of additional licenses from the FPGA vendor. In this work, we describe how IoTs can take advantage of the DPR capabilities of FPGAs, using a modified DPR methodology that does not require any paid “add-on” utility, to implement a lightweight cryptographic security protocol. We analyze possible threats that can emanate from the availability of DPR at IoT nodes, and propose possible solution techniques based on Physically Unclonable Function (PUF) circuits to prevent such threats.

AB - The Internet of Things (IoT) is a dynamic, ever-evolving “living” entity. Hence, modern Field Programmable Gate Array (FPGA) devices with Dynamic Partial Reconfiguration (DPR) capabilities, which allow in-field non-invasive modifications to the circuit implemented on the FPGA, are an ideal fit. Usually, the activation of DPR capabilities requires the procurement of additional licenses from the FPGA vendor. In this work, we describe how IoTs can take advantage of the DPR capabilities of FPGAs, using a modified DPR methodology that does not require any paid “add-on” utility, to implement a lightweight cryptographic security protocol. We analyze possible threats that can emanate from the availability of DPR at IoT nodes, and propose possible solution techniques based on Physically Unclonable Function (PUF) circuits to prevent such threats.

KW - Cryptographic Protocol

KW - Dynamic Partial Reconfiguration

KW - field programmable gate arrays (FPGAs)

KW - Hardware Trojan Horse

KW - Internet of things

KW - Physically Unclonable Functions

UR - http://ieeexplore.ieee.org/xpl/articleDetails.jsp?arnumber=7303941

M3 - Article

VL - 1

SP - 110

EP - 122

JO - IEEE Transactions on Multi-Scale Computing Systems

JF - IEEE Transactions on Multi-Scale Computing Systems

IS - 2

ER -