A Scalable Architecture for General Real-Time Array-Based DSP on FPGAs with Application to the Wave Equation

Ross Kirk, Jez Wells

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

This paper describes a scheme for parallel execution on FPGAs of DSP tasks which rely heavily on MAC operations. Multiple operations are assigned to a single ‘processing node’ such that each node can operate just in real-time. Where the number of MACs required exceeds the capability of a single processing node additional nodes are added until the capacity of the FPGA is ex-hausted. Additional requirements beyond the capability of a single FPGA are accommodated by extension across multiple devices, offering significant scalability. Resource usage, performance results for an example acoustic modelling application on a modest single FPGA and development system are presented.
Original languageEnglish
Title of host publicationProceedings of the 16th International Conference on Digital Audio Effects (DAFx13)
Publication statusPublished - Sep 2013
Event16th International Conference - Maynooth, Ireland
Duration: 2 Sep 20135 Sep 2013

Conference

Conference16th International Conference
Country/TerritoryIreland
CityMaynooth
Period2/09/135/09/13

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