A Scalable Solution to N-bit Parity via Artificial Development

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

The design of electronic circuits with model-free heuristics like evolutionary algorithms is an attractive concept and field of research. Although successful to a point, evolution of circuits that are bigger than a 3-bit multiplier is hindered by the scalability problem. Modelling the biological development as an artificial genotype-phenotype mapping mechanism has been shown to improve scalability on some simple circuit problems and pattern formations. As a candidate solution to the scalability issue, an artificial developmental system is presented.

The presented artificial developmental system is shown to develop a scalable parity circuit, which could be infinitely developed to build a growing parity circuit, hence, represents a general, scalable solution to n-bit parity.

The result obtained further supports the artificial developmental system as a good candidate solution to the scalability problem in evolvable hardware.

Original languageEnglish
Title of host publicationPRIME: PROCEEDINGS OF THE CONFERENCE 2009 PHD RESEARCH IN MICROELECTRONICS AND ELECTRONICS
Place of PublicationNEW YORK
PublisherIEEE
Pages144-147
Number of pages4
ISBN (Print)978-1-4244-3732-0
Publication statusPublished - 2009

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