As embryonic arrays take inspiration from nature they display biological properties, namely complex structure and fault-tolerance. However, they have yet to take advantage of a further biological feature at a fundamental level, asynchronous operation. In addition to the benefits normally associated with asynchronous digital design, such as intrinsic power management, two areas in which embryonic arrays could benefit are scalability and reliability.
This paper gives an overview of embryonic systems and a pertinent asynchronous methodology, that of macromodules. It is shown that a macromodule approach allows the implementation of asynchronous circuits on Xilinx Virtex FPGAs using only the standard design tools. A preliminary VHDL simulation illustrates the operation of an asynchronous embryonic array. Although mentioned, little detail of the reconfiguration scheme is given for brevity. This simulation brings truly asynchronous embryonic circuits a step closer.
|Title of host publication||THIRD NASA/DOD WORKSHOP ON EVOLVABLE HARDWARE, PROCEEDINGS|
|Editors||D Keymeulen, A Stoica, J Lohn, RS Zebulum|
|Place of Publication||LOS ALAMITOS|
|Publisher||IEEE Computer Society|
|Number of pages||10|
|Publication status||Published - 2001|
|Event||3rd NASA/DoD Workshop on Evolvable Hardware (EH-2001) - LONG BEACH|
Duration: 12 Jul 2001 → 14 Jul 2001
|Conference||3rd NASA/DoD Workshop on Evolvable Hardware (EH-2001)|
|Period||12/07/01 → 14/07/01|