Abstract
In this paper, we investigate the usability of several well-known real-time scheduling algorithms for a system consisting of a single processor core and multiple dynamically reconfigurable functional units, running a number of processes in parallel. A SystemC simulation model of a wireless sensor network node serves as a case study for assessing the performance of the different algorithms. Specific emphasis is given to the analysis of the configuration cache miss ratio and the number of context switches, which are indicators of costly operations of the reconfigurable units, respectively reconfiguration and saving internal state.
Original language | English |
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Title of host publication | 3rd Southern Conference on Programmable Logic, Proceedings |
Place of Publication | NEW YORK |
Publisher | IEEE |
Pages | 239-242 |
Number of pages | 4 |
ISBN (Print) | 978-1-4244-0606-7 |
Publication status | Published - 2007 |