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Evolving Variability-Tolerant CMOS Designs

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Evolving Variability-Tolerant CMOS Designs. / Walker, James Alfred; Hilder, James A.; Tyrrell, Andy M.

In: 8th International Conference on Evolvable Systems, Vol. 5216, 09.2008, p. 308-319.

Research output: Contribution to journalArticle

Harvard

Walker, JA, Hilder, JA & Tyrrell, AM 2008, 'Evolving Variability-Tolerant CMOS Designs', 8th International Conference on Evolvable Systems, vol. 5216, pp. 308-319.

APA

Walker, J. A., Hilder, J. A., & Tyrrell, A. M. (2008). Evolving Variability-Tolerant CMOS Designs. 8th International Conference on Evolvable Systems, 5216, 308-319.

Vancouver

Walker JA, Hilder JA, Tyrrell AM. Evolving Variability-Tolerant CMOS Designs. 8th International Conference on Evolvable Systems. 2008 Sep;5216:308-319.

Author

Walker, James Alfred ; Hilder, James A. ; Tyrrell, Andy M. / Evolving Variability-Tolerant CMOS Designs. In: 8th International Conference on Evolvable Systems. 2008 ; Vol. 5216. pp. 308-319.

Bibtex - Download

@article{80e03a825b4e4d50ae0e2ca6713fe56f,
title = "Evolving Variability-Tolerant CMOS Designs",
abstract = "As the size of CMOS devices is approaching the atomic level, the increasing intrinsic device variability is leading to higher failure rates in conventional designs. In this paper, two approaches are proposed for evolving unconventional variability-tolerant CMOS designs: one uses a simple Genetic Algorithm, whilst the other uses Cartesian Genetic Programming. Both approaches successfully evolve unconventional designs for logic gates, whilst an inverter design also shows signs of variability-tolerance.",
keywords = "SIMULATION, DEVICES",
author = "Walker, {James Alfred} and Hilder, {James A.} and Tyrrell, {Andy M.}",
year = "2008",
month = "9",
language = "English",
volume = "5216",
pages = "308--319",
journal = "8th International Conference on Evolvable Systems",

}

RIS (suitable for import to EndNote) - Download

TY - JOUR

T1 - Evolving Variability-Tolerant CMOS Designs

AU - Walker, James Alfred

AU - Hilder, James A.

AU - Tyrrell, Andy M.

PY - 2008/9

Y1 - 2008/9

N2 - As the size of CMOS devices is approaching the atomic level, the increasing intrinsic device variability is leading to higher failure rates in conventional designs. In this paper, two approaches are proposed for evolving unconventional variability-tolerant CMOS designs: one uses a simple Genetic Algorithm, whilst the other uses Cartesian Genetic Programming. Both approaches successfully evolve unconventional designs for logic gates, whilst an inverter design also shows signs of variability-tolerance.

AB - As the size of CMOS devices is approaching the atomic level, the increasing intrinsic device variability is leading to higher failure rates in conventional designs. In this paper, two approaches are proposed for evolving unconventional variability-tolerant CMOS designs: one uses a simple Genetic Algorithm, whilst the other uses Cartesian Genetic Programming. Both approaches successfully evolve unconventional designs for logic gates, whilst an inverter design also shows signs of variability-tolerance.

KW - SIMULATION

KW - DEVICES

UR - http://www.scopus.com/inward/record.url?scp=70349849800&partnerID=8YFLogxK

M3 - Article

VL - 5216

SP - 308

EP - 319

JO - 8th International Conference on Evolvable Systems

JF - 8th International Conference on Evolvable Systems

ER -