Abstract
As we approach the limits of CMOS technology, novel multiprocessor architectures are the industry's best shot to keep up with the expectations of the consumer electronics market regarding functionality and performance improvements. While many advances were achieved on efficient concurrent usage of the multiprocessing architectural features, the capturing and exploration of concurrency at the application level is still an open question. This paper will provide an outlook on different concepts and techniques available in modeling frameworks like UML, Matlab/Simulink and Ptolemy II, as well as the features and limitations from concurrent programming and hardware description languages. It will provide details on the most relevant of them and will identify the most likely candidates to be integrated into the design flow that will be used by SoC designers and application developers in the next five to ten years.
Original language | English |
---|---|
Title of host publication | 2006 International Symposium on System-on-Chip Proceedings |
Place of Publication | NEW YORK |
Publisher | IEEE |
Pages | 69-72 |
Number of pages | 4 |
ISBN (Print) | 978-1-4244-0621-0 |
Publication status | Published - 2006 |
Keywords
- SYSTEMS