Fast transaction-level dynamic power consumption modelling in priority preemptive wormhole switching networks on chip

James Robert Harbin; Leandro Soares Indrusiak

doi:10.1109/SAMOS.2013.6621120

Fast transaction-level dynamic power consumption modelling in priority preemptive wormhole switching networks on chip

James Robert Harbin, Leandro Soares Indrusiak

Computer Science

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Original language	English
Title of host publication	Proceedings of the International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation (SAMOS)
Publisher	IEEE
Pages	172-179
DOIs	https://doi.org/10.1109/SAMOS.2013.6621120
Publication status	Published - 2013
Event	Embedded Computer Systems: Architectures, Modeling, and Simulation (SAMOS XIII), 2013 International Conference - Agios Konstantinos , Greece Duration: 15 Jul 2013 → 18 Jul 2013

Conference

Conference	Embedded Computer Systems: Architectures, Modeling, and Simulation (SAMOS XIII), 2013 International Conference
Country/Territory	Greece
City	Agios Konstantinos
Period	15/07/13 → 18/07/13

Access to Document

10.1109/SAMOS.2013.6621120

http://ieeexplore.ieee.org/xpl/articleDetails.jsp?arnumber=6621120

LowPowNoC: Evaluation and reduction of power dissipation in multicore systems based on Networks-on-Chip
Soares Indrusiak, L. (Principal investigator), Harbin, J. R. (Researcher) & Sudev, B. (Student)
EPSRC
26/03/12 → 25/12/13
Project: Research project (funded) › Research

Cite this

@inproceedings{8138b3572cfc4f8ea758a7a1d7e975f9,

title = "Fast transaction-level dynamic power consumption modelling in priority preemptive wormhole switching networks on chip",

author = "Harbin, {James Robert} and {Soares Indrusiak}, Leandro",

year = "2013",

doi = "10.1109/SAMOS.2013.6621120",

language = "English",

pages = "172--179",

booktitle = "Proceedings of the International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation (SAMOS)",

publisher = "IEEE",

address = "United States",

note = "Embedded Computer Systems: Architectures, Modeling, and Simulation (SAMOS XIII), 2013 International Conference ; Conference date: 15-07-2013 Through 18-07-2013",

}

Harbin, JR & Soares Indrusiak, L 2013, Fast transaction-level dynamic power consumption modelling in priority preemptive wormhole switching networks on chip. in Proceedings of the International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation (SAMOS) . IEEE, pp. 172-179, Embedded Computer Systems: Architectures, Modeling, and Simulation (SAMOS XIII), 2013 International Conference, Agios Konstantinos , Greece, 15/07/13. https://doi.org/10.1109/SAMOS.2013.6621120

Fast transaction-level dynamic power consumption modelling in priority preemptive wormhole switching networks on chip. / Harbin, James Robert ; Soares Indrusiak, Leandro.
Proceedings of the International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation (SAMOS) . IEEE, 2013. p. 172-179.

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

TY - GEN

T1 - Fast transaction-level dynamic power consumption modelling in priority preemptive wormhole switching networks on chip

AU - Harbin, James Robert

AU - Soares Indrusiak, Leandro

PY - 2013

Y1 - 2013

U2 - 10.1109/SAMOS.2013.6621120

DO - 10.1109/SAMOS.2013.6621120

M3 - Conference contribution

SP - 172

EP - 179

BT - Proceedings of the International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation (SAMOS)

PB - IEEE

T2 - Embedded Computer Systems: Architectures, Modeling, and Simulation (SAMOS XIII), 2013 International Conference

Y2 - 15 July 2013 through 18 July 2013

ER -

Fast transaction-level dynamic power consumption modelling in priority preemptive wormhole switching networks on chip

Conference

Access to Document

Projects

LowPowNoC: Evaluation and reduction of power dissipation in multicore systems based on Networks-on-Chip

Cite this