Field-Programmable Gate Array: WO2013064839

TY - GEN

T1 - Field-Programmable Gate Array

T2 - WO2013064839

AU - Trefzer, Martin Albrecht

AU - Walker, James Alfred

AU - Tyrrell, Andy

PY - 2013/5/10

Y1 - 2013/5/10

N2 - An FPGA has a number of CLBs, each CLB having a number of CABs. Each CAB comprises: a number of configurable transistors each comprising one or more usable transistors M and a number of switching transistors; and, configuration circuitry comprising a number of switching transistors. The ratio of switching transistors to usable transistors for each CAB is less than 26:1. A method of configuring such an FPGA comprises optimising each configurable transistor.

AB - An FPGA has a number of CLBs, each CLB having a number of CABs. Each CAB comprises: a number of configurable transistors each comprising one or more usable transistors M and a number of switching transistors; and, configuration circuitry comprising a number of switching transistors. The ratio of switching transistors to usable transistors for each CAB is less than 26:1. A method of configuring such an FPGA comprises optimising each configurable transistor.

KW - FPGA, reconfigurable architectures, patent

M3 - Other contribution

ER -