FPGA implementation of DCD based CDMA multiuser detector

Zhi Quan; Jie Liu; Yuriy Zakharov

FPGA implementation of DCD based CDMA multiuser detector

Electronic Engineering

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Abstract

A field-programmable gate array (FPGA) implementation of a new algorithm for multiuser detection (MUD) is presented in this paper. This FPGA design is based on the Dichotomous Coordinate Descent (DCD)algorithm. The DCD algorithm) allows the multiplication-free solution of the normal equations appearing in the MUD problem. This results in an area-efficient FPGA design that requires about 400 slices and offers a constant throughput over a signal-to-noise ratio range. Results obtained front the fixed-point FPGA implementation are compared with those of a floating-point implementation. The bit-error-rate performance comparison shows good match of the results for as large number of users as 50.

Original language	English
Title of host publication	Proceedings of the 2007 15th International Conference on Digital Signal Processing
Editors	S Sanei, JA Chambers, J McWhirter, Y Hicks, AG Constantinides
Place of Publication	NEW YORK
Publisher	IEEE
Pages	319-322
Number of pages	4
ISBN (Print)	978-1-4244-0881-8
Publication status	Published - 2007
Event	15th International Conference on Digital Signal Processing - Cardiff Duration: 1 Jul 2007 → 4 Jul 2007

Conference

Conference	15th International Conference on Digital Signal Processing
City	Cardiff
Period	1/07/07 → 4/07/07

Keywords

FPGA
CDMA
multiuser detection
DCD
COMPLEXITY
ALGORITHM

Cite this

@inproceedings{93d3cb82bb6142efb83adcc37d922bb6,

title = "FPGA implementation of DCD based CDMA multiuser detector",

abstract = "A field-programmable gate array (FPGA) implementation of a new algorithm for multiuser detection (MUD) is presented in this paper. This FPGA design is based on the Dichotomous Coordinate Descent (DCD)algorithm. The DCD algorithm) allows the multiplication-free solution of the normal equations appearing in the MUD problem. This results in an area-efficient FPGA design that requires about 400 slices and offers a constant throughput over a signal-to-noise ratio range. Results obtained front the fixed-point FPGA implementation are compared with those of a floating-point implementation. The bit-error-rate performance comparison shows good match of the results for as large number of users as 50.",

keywords = "FPGA, CDMA, multiuser detection, DCD, COMPLEXITY, ALGORITHM",

author = "Zhi Quan and Jie Liu and Yuriy Zakharov",

year = "2007",

language = "English",

isbn = "978-1-4244-0881-8",

pages = "319--322",

editor = "S Sanei and JA Chambers and J McWhirter and Y Hicks and AG Constantinides",

booktitle = "Proceedings of the 2007 15th International Conference on Digital Signal Processing",

publisher = "IEEE",

address = "United States",

note = "15th International Conference on Digital Signal Processing ; Conference date: 01-07-2007 Through 04-07-2007",

}

FPGA implementation of DCD based CDMA multiuser detector. / Quan, Zhi; Liu, Jie; Zakharov, Yuriy.

Proceedings of the 2007 15th International Conference on Digital Signal Processing. ed. / S Sanei; JA Chambers; J McWhirter; Y Hicks; AG Constantinides. NEW YORK : IEEE, 2007. p. 319-322.

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

TY - GEN

T1 - FPGA implementation of DCD based CDMA multiuser detector

AU - Quan, Zhi

AU - Liu, Jie

AU - Zakharov, Yuriy

PY - 2007

Y1 - 2007

N2 - A field-programmable gate array (FPGA) implementation of a new algorithm for multiuser detection (MUD) is presented in this paper. This FPGA design is based on the Dichotomous Coordinate Descent (DCD)algorithm. The DCD algorithm) allows the multiplication-free solution of the normal equations appearing in the MUD problem. This results in an area-efficient FPGA design that requires about 400 slices and offers a constant throughput over a signal-to-noise ratio range. Results obtained front the fixed-point FPGA implementation are compared with those of a floating-point implementation. The bit-error-rate performance comparison shows good match of the results for as large number of users as 50.

AB - A field-programmable gate array (FPGA) implementation of a new algorithm for multiuser detection (MUD) is presented in this paper. This FPGA design is based on the Dichotomous Coordinate Descent (DCD)algorithm. The DCD algorithm) allows the multiplication-free solution of the normal equations appearing in the MUD problem. This results in an area-efficient FPGA design that requires about 400 slices and offers a constant throughput over a signal-to-noise ratio range. Results obtained front the fixed-point FPGA implementation are compared with those of a floating-point implementation. The bit-error-rate performance comparison shows good match of the results for as large number of users as 50.

KW - FPGA

KW - CDMA

KW - multiuser detection

KW - DCD

KW - COMPLEXITY

KW - ALGORITHM

M3 - Conference contribution

SN - 978-1-4244-0881-8

SP - 319

EP - 322

BT - Proceedings of the 2007 15th International Conference on Digital Signal Processing

A2 - Sanei, S

A2 - Chambers, JA

A2 - McWhirter, J

A2 - Hicks, Y

A2 - Constantinides, AG

PB - IEEE

CY - NEW YORK

T2 - 15th International Conference on Digital Signal Processing

Y2 - 1 July 2007 through 4 July 2007

ER -