FPGA implementation of DCD based CDMA multiuser detector

Zhi Quan, Jie Liu, Yuriy Zakharov

Research output: Chapter in Book/Report/Conference proceedingConference contribution


A field-programmable gate array (FPGA) implementation of a new algorithm for multiuser detection (MUD) is presented in this paper. This FPGA design is based on the Dichotomous Coordinate Descent (DCD)algorithm. The DCD algorithm) allows the multiplication-free solution of the normal equations appearing in the MUD problem. This results in an area-efficient FPGA design that requires about 400 slices and offers a constant throughput over a signal-to-noise ratio range. Results obtained front the fixed-point FPGA implementation are compared with those of a floating-point implementation. The bit-error-rate performance comparison shows good match of the results for as large number of users as 50.

Original languageEnglish
Title of host publicationProceedings of the 2007 15th International Conference on Digital Signal Processing
EditorsS Sanei, JA Chambers, J McWhirter, Y Hicks, AG Constantinides
Place of PublicationNEW YORK
Number of pages4
ISBN (Print)978-1-4244-0881-8
Publication statusPublished - 2007
Event15th International Conference on Digital Signal Processing - Cardiff
Duration: 1 Jul 20074 Jul 2007


Conference15th International Conference on Digital Signal Processing


  • FPGA
  • CDMA
  • multiuser detection
  • DCD

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