Abstract
In this paper we propose a hardware support structure for the implementation of backward error recovery mechanisms as applied to dependable systems. The proposed design moves on form previous hardware support systems by considering all phases of error recovery, not simply the saving of critical state information. The proposed architecture makes use of programmable logic devices to provide a flexible and efficient implementation of the software constructs proposed for error recovery. The system under consideration consists of a distributed parallel processing system with cooperating processes. In the final version. of this paper quantitative results on reliability will be given.
Original language | English |
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Title of host publication | 23RD EUROMICRO CONFERENCE - NEW FRONTIERS OF INFORMATION TECHNOLOGY, PROCEEDINGS |
Place of Publication | LOS ALAMITOS |
Publisher | IEEE Computer Society |
Pages | 492-498 |
Number of pages | 7 |
ISBN (Print) | 0-8186-8130-6 |
Publication status | Published - 1997 |
Event | 23rd Euromicro Conference on New Frontiers of Information Technology - BUDAPEST Duration: 1 Sep 1997 → 4 Sep 1997 |
Conference
Conference | 23rd Euromicro Conference on New Frontiers of Information Technology |
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City | BUDAPEST |
Period | 1/09/97 → 4/09/97 |