Hardware support for backward error recovery

A M Tyrrell, M J Freeman

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

In this paper we propose a hardware support structure for the implementation of backward error recovery mechanisms as applied to dependable systems. The proposed design moves on form previous hardware support systems by considering all phases of error recovery, not simply the saving of critical state information. The proposed architecture makes use of programmable logic devices to provide a flexible and efficient implementation of the software constructs proposed for error recovery. The system under consideration consists of a distributed parallel processing system with cooperating processes. In the final version. of this paper quantitative results on reliability will be given.

Original languageEnglish
Title of host publication23RD EUROMICRO CONFERENCE - NEW FRONTIERS OF INFORMATION TECHNOLOGY, PROCEEDINGS
Place of PublicationLOS ALAMITOS
PublisherIEEE Computer Society
Pages492-498
Number of pages7
ISBN (Print)0-8186-8130-6
Publication statusPublished - 1997
Event23rd Euromicro Conference on New Frontiers of Information Technology - BUDAPEST
Duration: 1 Sep 19974 Sep 1997

Conference

Conference23rd Euromicro Conference on New Frontiers of Information Technology
CityBUDAPEST
Period1/09/974/09/97

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