By the same authors

Instruction Complexity in implicit-execution architectures: orthogonality, optimisation, and VLSI design

Research output: Contribution to conferenceAbstract

Author(s)

Department/unit(s)

Conference

ConferenceInternational Conference on Mathematical Modelling and Scientific Computing
CountryUnited Kingdom
Conference date(s)1/07/95 → …

Publication details

DatePublished - 1997
Original languageEnglish

Abstract

With the rapid emergence of Java as a machine independent programming environment, the stack-based
processor model has entered a renaissance of interest after a long period of indifference from the general
research community. The implicit execution mode employed in Java byte-code interpretation demands
optimal execution of code on a stack-based virtual (or physical) machine model.
One efficient solution is to utilise a stack-based microprocessor paradigm in which the associated native
code mirrors the semantics of the object byte-code. This approach already has a past-history that spans the
era of ALGOL through to present day FORTH-Engine implementations. However, the development of
virtual and/or native semantic content of these environments has suffered a haphazard evolution, influenced
more by convenience than by formalised concepts of stack-oriented execution. As a result, instruction-set
schemes for stack based processing models have suffered from a lack of orthogonality that suits human
programmers, but complicates automated code generation and optimisation.
In this paper, we propose a classification scheme, a scaleable and symmetrical model for stack
manipulation, which allows the degree of instruction complexity to be specified and the orthogonality of
those functions to be visualised.
Using a virtual machine simulator, VHDL models of CPU designs, and analysis of synthesised VHDL
models, we show that the effects of varied degrees of instruction complexity have a clear and quantifiable
impact on program efficiency, system performance, and VLSI logic characterisation.

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