TY - JOUR
T1 - Low-Power Coding for Networks-on-Chip with Virtual Channels
AU - Garcia-Ortiz, Alberto
AU - Soares Indrusiak, Leandro
AU - Murgan, Tudor
AU - Glesner, Manfred
PY - 2009/4
Y1 - 2009/4
N2 - Virtual channels are a common alternative for providing quality-of-service to Networks-on-Chip. A drawback of the approach is the increased power consumption because of the suppression of correlation between consecutive flits. This work proposes an architecture based on low-power coding to overcome the aforementioned problem. The technique requires a minimum overhead, while obtaining a significant power reduction (45% in the average case). Exhaustive experimental simulations are provided to demonstrate the advantages of the proposed architecture.
AB - Virtual channels are a common alternative for providing quality-of-service to Networks-on-Chip. A drawback of the approach is the increased power consumption because of the suppression of correlation between consecutive flits. This work proposes an architecture based on low-power coding to overcome the aforementioned problem. The technique requires a minimum overhead, while obtaining a significant power reduction (45% in the average case). Exhaustive experimental simulations are provided to demonstrate the advantages of the proposed architecture.
UR - http://www.scopus.com/inward/record.url?scp=61649117996&partnerID=8YFLogxK
U2 - 10.1007/978-3-540-95948-9_22
DO - 10.1007/978-3-540-95948-9_22
M3 - Article
SN - 1546-1998
VL - 5
SP - 77
EP - 84
JO - Journal of Low Power Electronics
JF - Journal of Low Power Electronics
IS - 1
ER -