TY - CHAP
T1 - MADES FP7 EU project
T2 - Effective high level SysML/MARTE methodology for real-time and embedded avionics systems
AU - Bagnato, Alessandra
AU - Quadri, Imran
AU - Brosse, Etienne
AU - Sadovykh, Andrey
AU - Indrusiak, Leandro Soares
AU - Paige, Richard
AU - Audsley, Neil
AU - Gray, Ian
AU - Kolovos, Dimitrios S.
AU - Matragkas, Nicholas
AU - Rossi, Matteo
AU - Baresi, Luciano
AU - Crippa, Matteo Carlo
AU - Genolini, Stefano
AU - Hansen, Scott
AU - Meisel-Blohm, Gundula
PY - 2014/6/30
Y1 - 2014/6/30
N2 - This chapter presents the EU-funded MADES FP7 project that aims to develop an effective model-driven methodology to improve the current practices in the development of real-time embedded systems for avionics and surveillance industries. MADES developed an effective SysML/MARTE language subset, and a set of new tools and technologies that support high-level design specifications, validation, simulation, and automatic code generation, while integrating aspects such as component re-use. This chapter illustrates the MADES methodology by means of a car collision avoidance system case study; it presents the underlying MADES language, the design phases, and the set of tools supporting on one hand model verification and validation and, on the other hand, automatic code generation, which enables the implementation on execution platforms such as state-of-the-art FPGAs.
AB - This chapter presents the EU-funded MADES FP7 project that aims to develop an effective model-driven methodology to improve the current practices in the development of real-time embedded systems for avionics and surveillance industries. MADES developed an effective SysML/MARTE language subset, and a set of new tools and technologies that support high-level design specifications, validation, simulation, and automatic code generation, while integrating aspects such as component re-use. This chapter illustrates the MADES methodology by means of a car collision avoidance system case study; it presents the underlying MADES language, the design phases, and the set of tools supporting on one hand model verification and validation and, on the other hand, automatic code generation, which enables the implementation on execution platforms such as state-of-the-art FPGAs.
UR - http://www.scopus.com/inward/record.url?scp=84945377636&partnerID=8YFLogxK
U2 - 10.4018/978-1-4666-6194-3.ch008
DO - 10.4018/978-1-4666-6194-3.ch008
M3 - Chapter
AN - SCOPUS:84945377636
SN - 9781466661950
SN - 1466661941
SN - 9781466661943
SP - 181
EP - 208
BT - Handbook of Research on Embedded Systems Design
PB - IGI Global
ER -