Model-based design flow for NoC-based MPSoCs

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DatePublished - 1 Dec 2010
Original languageUndefined/Unknown

Abstract

High-level abstraction modeling of NoC-based MPSoCs is an emerging approach to handle the vast design space alternatives of such systems. In this context, this work presents a model-based design flow, allowing the design space exploration of NoC-based MPSoCs at early stages of the design flow. The proposed flow supports accurate performance evaluation, latency and power consumptions for example, which are important to the adoption or rejection of design alternatives. A case of study is used to demonstrate some steps of the flow and to show some possible performance parameters that can be considered in the proposed design flow.

    Research areas

  • NoC-based MPSoC, design space exploration, high-level abstraction modeling, model-based design flow, network-on-chip, system-on-chip, integrated circuit design, integrated circuit modelling

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