Models of oxygen vacancy defects involved in degradation of gate dielectrics

A.L. Shluger, K.P. McKenna

Research output: Chapter in Book/Report/Conference proceedingChapter


Capture and emission of carriers by point defects in gate dielectrics, such as SiO and HfO, and at their interfaces with the substrate is thought to be responsible for the performance and reliability issues in MOS devices, in particular, 1/f noise, negative bias temperature instability (NBTI), and long-term dielectric reliability and degradation. The ultra-thin silicon dioxide layer present at the interface between Si and high-k films plays a critical role in the performance of high-k gate oxide stacks. However, detailed atomistic models relating device electrical characteristics to the properties of defects in gate dielectrics are only starting to emerge. We review some of the theoretical models proposed for oxygen deficient defects in silica and hafnia and their charge trapping behavior. These models are related to physical characterization of degradation processes in CMOS devices.
Original languageEnglish
Title of host publicationIEEE International Reliability Physics Symposium Proceedings
Pages5A.1.1 - 5A.1.9
ISBN (Print)9781479901135
Publication statusPublished - 1 Jan 2013

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