Overcoming Faults using Evolution on the PAnDA Architecture

TY - GEN

T1 - Overcoming Faults using Evolution on the PAnDA Architecture

AU - Burmester Campos, Pedro

AU - Lawson, David Michael Renwick

AU - Trefzer, Martin Albrecht

AU - Walker, James Alfred

AU - Bale, Simon Jonathan

AU - Tyrrell, Andy

PY - 2013

Y1 - 2013

N2 - This paper explores the potential for transistor level fault tolerance on a new Programmable Analogue and Digital Array (PAnDA) architecture1. In particular, this architecture features Combinatorial Configurable Analogue Blocks (CCABs) that can implement a number of combinatorial functions similar to FPGAs. In addition, PAnDA allows one to reconfigure features of the underlying analogue layer. In PAnDA-EINS, the functions that the CCAB can implement are predefined through the use of a routing block. This paper is a study of whether removing this routing block and allowing direct control of the transistors provides benefits for fault tolerance. Experiments are conducted in two stages. In the first stage, a logic function is evolved on a CCAB and then optimised using a GA. A fault is then injected into the substrate, breaking the logic function. The second stage of the experiment consists of evolving the logic function again on the faulty substrate. The results of these experiments show that the removal of the routing block from the CCAB is beneficial for fault tolerance.

AB - This paper explores the potential for transistor level fault tolerance on a new Programmable Analogue and Digital Array (PAnDA) architecture1. In particular, this architecture features Combinatorial Configurable Analogue Blocks (CCABs) that can implement a number of combinatorial functions similar to FPGAs. In addition, PAnDA allows one to reconfigure features of the underlying analogue layer. In PAnDA-EINS, the functions that the CCAB can implement are predefined through the use of a routing block. This paper is a study of whether removing this routing block and allowing direct control of the transistors provides benefits for fault tolerance. Experiments are conducted in two stages. In the first stage, a logic function is evolved on a CCAB and then optimised using a GA. A fault is then injected into the substrate, breaking the logic function. The second stage of the experiment consists of evolving the logic function again on the faulty substrate. The results of these experiments show that the removal of the routing block from the CCAB is beneficial for fault tolerance.

KW - fault-tolerance

KW - evolutionary computation

KW - PAnDA

KW - hardware

KW - reconfigurable hardware

KW - variability

U2 - 10.1109/CEC.2013.6557625

DO - 10.1109/CEC.2013.6557625

M3 - Conference contribution

SP - 613

EP - 620

BT - Proceedings of the IEEE Congress on Evolutionary Computation (CEC)

PB - IEEE

T2 - Congress on Evolutionary Computation (CEC)

Y2 - 8 December 2003 through 12 December 2003

ER -