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Power-aware dynamic mapping heuristics for NoC-based MPSoCs using a unified model-based approach
Research output: Contribution to journal › Article › peer-review
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Publication details
| Journal | ACM Transactions in Embedded Computing Systems |
|---|---|
| Date | Published - Mar 2013 |
| Issue number | 3 |
| Volume | 12 |
| Number of pages | 22 |
| Original language | English |
Abstract
The mapping of tasks to processing elements of an MPSoC has critical impact on system performance and energy consumption. To cope with complex dynamic behavior of applications, it is common to perform task mapping during runtime so that the utilization of processors and interconnect can be taken into account
when deciding the allocation of each task. This paper has two major contributions, one of them targeting the general problem of evaluating dynamic mapping heuristics in NoC-based MPSoCs, and another focusing on the specific problem of finding a task mapping that optimizes energy consumption in those architectures.
when deciding the allocation of each task. This paper has two major contributions, one of them targeting the general problem of evaluating dynamic mapping heuristics in NoC-based MPSoCs, and another focusing on the specific problem of finding a task mapping that optimizes energy consumption in those architectures.
Projects
Evaluation and reduction of power dissipation in multicore systems based on Networks-on-Chip
Project: Research project (funded) › Research
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