Quantitative Assessment of Machine-Stack behaviour for better Computer Performance

Research output: Contribution to conferenceAbstractpeer-review

Abstract

This paper presents an experiment to quantify stack behaviour during execution of a range of
complementary programs. Through better understanding of stack behaviour, further optimisations can
be made, not only improving stack machine efficiency, but perhaps influencing future designs both in
RISC and CISC technologies.
Mainstream technology has always been dominated by explicitly addressed register file architectures,
with two clear philosophies predominant. The CISC school of thought demands complex instruction
sets to reduce the semantic gap : 'More work for less code'. On the flip-side of the coin, RISC
proponents believe simplicity and speed will succeed, even if more instructions are executed. The
'Stack machine' alternative, has been pushed to the back of the queue in terms of research and
development.
Stack machines abandon traditional register file concepts, and with them, the need for register
addressing in program code. Instead, operands are, by default, found at the top of stack. The benefits
of reducing instruction size and functional complexity offer potential for comparable performance to
that of RISC and CISC architectures. Quantitative assessment of stack behaviour will clearly
demonstrate statistical and probabilistic examples of stack actions, helping to guide future designs.
Original languageEnglish
Pages1
Number of pages11
Publication statusPublished - 1993
Event 9th International conference on mathematical and computer modelling and scientific computing - USA, Berkeley, United States
Duration: 1 Jul 1993 → …

Conference

Conference 9th International conference on mathematical and computer modelling and scientific computing
Country/TerritoryUnited States
CityBerkeley
Period1/07/93 → …

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