Abstract
This paper considers the use of routerless networks-on-chip as an alternative on-chip interconnect for multiprocessor systems requiring hard real-time guarantees for inter-processor communication. It presents a novel analytical framework that can provide latency upper bounds to real-time packet flows sent over routerless networks-on-chip, and it uses that framework to evaluate the ability of such networks to provide real-time guarantees. Extensive comparative analysis is provided, considering different architectures for routerless networks and a state-of-the-art wormhole network based on priority-preemptive routers as a baseline.
Original language | English |
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Article number | 88 |
Number of pages | 27 |
Journal | ACM Transactions on Embedded Computing Systems |
Volume | 22 |
Issue number | 5 |
Early online date | 23 Aug 2023 |
DOIs | |
Publication status | E-pub ahead of print - 23 Aug 2023 |