Remote Dynamic Clock Reconfiguration based Attacks on Internet of Things Applications

Anju P. Johnson; Sikhar Patranabis; Rajat Subhra  Chakraborty; Debdeep Mukhopadhyay

doi:10.1109/DSD.2016.16

Remote Dynamic Clock Reconfiguration based Attacks on Internet of Things Applications

Anju P. Johnson, Sikhar Patranabis, Rajat Subhra Chakraborty, Debdeep Mukhopadhyay

Electronic Engineering

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Abstract

Many Internet of Things (IoT) applications can potentially benefit from the
remote Dynamic Partial Reconfiguration (DPR) capabilities of modern Field Programmable Gate Arrays~(FPGAs). Such capabilities enable changes in
the circuit mapped on the FPGA, for modification or enhancement of functionality offered by the FPGA without taking it offline, via remote communications over a network. However, the use of remote DPR can result in security threats with catastrophic consequences. In this paper, we design two Hardware Trojan Horse attacks that exploit the remote DPR capability of the FPGA, on an encryption circuit and a true random number generator circuit,
respectively. In particular, these attacks target the clock signal management circuitry on the FPGA to disrupt functionality. We substantiate the threat by demonstrating successful remote attacks via transfer of malicious bitstreams to a Virtex-5 FPGA, thereby embedding the HTH. Finally, we propose plausible
countermeasures to prevent such attacks.

Original language	English
Title of host publication	IEEE Xplore, EUROMICRO Digital System Design Conference (DSD) (special session on Architectures and Hardware for Security Applications), Limassol, Cyprus, 2016
Publisher	IEEE
DOIs	https://doi.org/10.1109/DSD.2016.16
Publication status	Published - 31 Aug 2016

Access to Document

10.1109/DSD.2016.16

http://ieeexplore.ieee.org/document/7723583/?reload=true

Cite this

Johnson, A. P., Patranabis, S., Chakraborty, R. S., & Mukhopadhyay, D. (2016). Remote Dynamic Clock Reconfiguration based Attacks on Internet of Things Applications. In IEEE Xplore, EUROMICRO Digital System Design Conference (DSD) (special session on Architectures and Hardware for Security Applications), Limassol, Cyprus, 2016 IEEE. https://doi.org/10.1109/DSD.2016.16

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title = "Remote Dynamic Clock Reconfiguration based Attacks on Internet of Things Applications",

abstract = "Many Internet of Things (IoT) applications can potentially benefit from theremote Dynamic Partial Reconfiguration (DPR) capabilities of modern Field Programmable Gate Arrays~(FPGAs). Such capabilities enable changes inthe circuit mapped on the FPGA, for modification or enhancement of functionality offered by the FPGA without taking it offline, via remote communications over a network. However, the use of remote DPR can result in security threats with catastrophic consequences. In this paper, we design two Hardware Trojan Horse attacks that exploit the remote DPR capability of the FPGA, on an encryption circuit and a true random number generator circuit, respectively. In particular, these attacks target the clock signal management circuitry on the FPGA to disrupt functionality. We substantiate the threat by demonstrating successful remote attacks via transfer of malicious bitstreams to a Virtex-5 FPGA, thereby embedding the HTH. Finally, we propose plausible countermeasures to prevent such attacks.",

author = "Johnson, {Anju P.} and Sikhar Patranabis and Chakraborty, {Rajat Subhra} and Debdeep Mukhopadhyay",

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Remote Dynamic Clock Reconfiguration based Attacks on Internet of Things Applications. / Johnson, Anju P.; Patranabis, Sikhar; Chakraborty, Rajat Subhra et al.
IEEE Xplore, EUROMICRO Digital System Design Conference (DSD) (special session on Architectures and Hardware for Security Applications), Limassol, Cyprus, 2016. IEEE, 2016.

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

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AB - Many Internet of Things (IoT) applications can potentially benefit from theremote Dynamic Partial Reconfiguration (DPR) capabilities of modern Field Programmable Gate Arrays~(FPGAs). Such capabilities enable changes inthe circuit mapped on the FPGA, for modification or enhancement of functionality offered by the FPGA without taking it offline, via remote communications over a network. However, the use of remote DPR can result in security threats with catastrophic consequences. In this paper, we design two Hardware Trojan Horse attacks that exploit the remote DPR capability of the FPGA, on an encryption circuit and a true random number generator circuit, respectively. In particular, these attacks target the clock signal management circuitry on the FPGA to disrupt functionality. We substantiate the threat by demonstrating successful remote attacks via transfer of malicious bitstreams to a Virtex-5 FPGA, thereby embedding the HTH. Finally, we propose plausible countermeasures to prevent such attacks.

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