Projects per year
Abstract
This paper introduces analyses of write-back caches integrated into response-time analysis for fixed-priority preemptive and non-preemptive scheduling. For each scheduling paradigm, we derive four different approaches to computing the additional costs incurred due to write backs. We show the dominance relationships between these different approaches and note how they can be combined to form a single state-of-the-art approach in each case. The evaluation explores the relative performance of the different methods using a set of benchmarks, as well as making comparisons with no cache and a write-through cache. We also explore the effect of write buffers used to hide the latency of write-through caches. We show that depending upon the depth of the buffer used and the policies employed, such buffers can result in domino effects. Our evaluation shows that even ignoring domino effects, a substantial write buffer is needed to match the guaranteed performance of write-back caches.
Original language | English |
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Number of pages | 52 |
Journal | Real-Time Systems |
DOIs | |
Publication status | Published - 11 Apr 2018 |
Bibliographical note
© The Author(s), 2018.Keywords
- real time
- scheduling
- cache related preemption delays
- write back
- write through
- caches
- schedulability analysis
- write buffers
Profiles
Projects
- 1 Finished
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Mixed Criticality Cyber- Physical Systems
Burns, A. (Principal investigator), Bate, I. J. (Co-investigator), Davis, R. I. (Co-investigator) & Soares Indrusiak, L. (Co-investigator)
1/10/16 → 30/09/19
Project: Research project (funded) › Research