The use of field-programmable gate arrays for the hardware acceleration of design automation tasks

N J Howard, A M Tyrrell, N M Allinson

Research output: Contribution to journalArticlepeer-review


This paper investigates the possibility of using Field-Programmable Gate Arrays (FPGAs) as reconfigurable co-processors for workstations to produce moderate speedups for most tasks in the design process, resulting in a worthwhile overall design process speedup at low cost and allowing algorithm upgrades with no hardware modification. The use of FPGAs as hardware accelerators is reviewed and then achievable speedups are predicted for logic simulation and VLSI design rule checking tasks for various FPGA co-processor arrangements.

Original languageEnglish
Pages (from-to)135-139
Number of pages5
JournalVlsi design
Issue number2
Publication statusPublished - 1996



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