Anju Johnson

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Dr. Anju Johnson

(Former)

  1. 2019
  2. GABA Regulation of Burst Firing in Hippocampal Astrocyte Neural Circuit: A Biophysical Model

    Liu, J., McDaid, L., Araque, A., Wade, J., Harkin, J., Karim, S., Henshall, D. C., Connolly, N. M. C., Johnson, A. P., Tyrrell, A. M., Timmis, J., Millard, A. G., Hilder, J. & Halliday, D. M., 23 Jul 2019

    Article in Frontiers in Cellular Neuroscience

  3. 2018
  4. Time-multiplexed System-on-Chip using Fault-tolerant Astrocyte-Neuron Networks

    Johnson, A. P., Liu, J., Millard, A. G., Karim, S., Tyrrell, A. M., Harkin, J., Timmis, J. I., McDaid, L. J. & Halliday, D. M., 1 Sep 2018, (Accepted/In press).

    Research output: Contribution to conferencePaper

  5. FPGA-based Fault-injection and Data Acquisition of Self-repairing Spiking Neural Network Hardware

    Karim, S., Harkin, J., McDaid, L., Gardiner, B., Liu, J., Halliday, D. M., Tyrrell, A. M., Timmis, J. I., Millard, A. G. & Johnson, A. P., 4 May 2018, 2018 IEEE International Symposium on Circuits and Systems (ISCAS). IEEE, 5 p. (IEEE International Conference on Circuits and Systems.).

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

  6. Fault-tolerant Learning in Spiking Astrocyte-Neural Networks on FPGAs

    Johnson, A. P., Liu, J., Millard, A. G., Karim, S., Tyrrell, A. M., Harkin, J., Timmis, J. I., McDaid, L. & Halliday, D. M., 29 Mar 2018, 31st International Conference on VLSI Design (VLSID 2018) & 17th International Conference on Embedded Systems (ES 2018). IEEE

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

  7. 2017
  8. Self-Repairing Learning Rule for Spiking Astrocyte-Neuron Networks

    Liu, J., McDaid, L., Harkin, J., Wade, J., Karim, S., Johnson, A. P., Millard, A. G., Halliday, D. M., Tyrrell, A. M. & Timmis, J. I., 27 Oct 2017, Neural Information Processing: 24th International Conference, ICONIP 2017, Guangzhou, China, November 14-18, 2017, Proceeding, Part II. Liu, D., Xie, S., Li, Y., Zhao, D. & El-Alfy, E-SM. (eds.). Springer, (Lecture Notes in Computer Science; vol. 10634, 10635 10636, 10637, 10638, 10639).

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

  9. Homeostatic Fault Tolerance in Spiking Neural Networks utilizing Dynamic Partial Reconfiguration of FPGAs

    Johnson, A. P., Liu, J., Millard, A. G., Karim, S., Tyrrell, A. M., Harkin, J., Timmis, J. I., McDaid, L. & Halliday, D. M., 15 Sep 2017, (Accepted/In press) The International Conference on Field-Programmable Technology (FPT-2017). IEEE

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

  10. Assessing Self-Repair on FPGAs with Biologically Realistic Astrocyte-Neuron Networks

    Karim, S., Harkin, J., McDaid, L., Gardiner, B., Liu, J., Halliday, D. M., Tyrrell, A. M., Timmis, J. I., Millard, A. G. & Johnson, A. P., 24 Jul 2017, IEEE Xplore: IS VLSI. 6 p. ( VLSI (ISVLSI), IEEE Computer Society Annual Symposium on).

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

  11. An FPGA-based hardware-efficient fault-tolerant astrocyte-neuron network

    Johnson, A. P., Halliday, D. M., Millard, A. G., Tyrrell, A. M., Timmis, J., Liu, J., Harkin, J., McDaid, L. & Karim, S., 9 Feb 2017, 2016 IEEE Symposium Series on Computational Intelligence, SSCI 2016. Institute of Electrical and Electronics Engineers Inc., 7850175

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

  12. 2016
  13. Remote Dynamic Clock Reconfiguration based Attacks on Internet of Things Applications

    Johnson, A. P., Patranabis, S., Chakraborty, R. S. & Mukhopadhyay, D., 31 Aug 2016, IEEE Xplore, EUROMICRO Digital System Design Conference (DSD) (special session on Architectures and Hardware for Security Applications), Limassol, Cyprus, 2016. IEEE

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

  14. Remote Dynamic Partial Reconfiguration of FPGA Based Embedded Systems: Threats and Countermeasures (Extended Abstract)

    Johnson, A. P., Chakraborty, R. S. & Mukhopadhyay, D., Jan 2016, 29TH International Conference on VLSI Design & 15TH International Conference on Embedded Systems, Kolkata, India.

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

  15. An FPGA-based Hardware-Efficient Fault-Tolerant Astrocyte-Neuron Network

    Johnson, A. P., Halliday, D. M., Millard, A. G., Tyrrell, A. M., Timmis, J., Liu, J., Harkin, J., McDaid, L. & Karim, S., 2016, (Accepted/In press).

    Research output: Contribution to conferencePaper

  16. 2015
  17. A Novel Attack on a FPGA based True Random Number Generator

    Johnson, A. P., Chakraborty, R. S. & Mukhopadhyay, D., 4 Oct 2015, WESS'15 Proceedings of the WESS'15: Workshop on Embedded Systems Security. ACM, 6

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

  18. Patent: System for dynamic partial reconfiguration of FPGAs over Ethernet: India: 806/KOL/2015

    Johnson, A. P., Chakraborty, R. S. & Mukhopadhyay, D., 2015.

    Research output: Contribution to conferenceOther

  19. 2014
  20. Fault Attack on AES via Hardware Trojan Insertion by Dynamic Partial Reconfiguration of FPGA over Ethernet

    Johnson, A. P., Saha, S., Chakraborty, R. S., Mukhopadhyay, D. & Gören, S., Oct 2014, Workshop on Embedded Systems Security (WESS, part of ACM ESWEEK) 2014, New Delhi, India. ACM

    Research output: Chapter in Book/Report/Conference proceedingConference contribution